The art of printed board testing is well established. One approach used to test and isolate faults in printed circuit boards is to feed the same test pattern into a known good board and the board under test. The same test points on both boards are then compared in real time to locate faults in the board under test. The apparent shortcoming of this method is a need for high speed signal comparators, cumbersome test point connections and maintenance of the reference board.
Another method of testing boards is to apply a known input test pattern to a good reference board, whose test point outputs are sent to a data capture unit, such as a logic analyzer, that causes an output test pattern file to be stored in a computer. The same input test pattern is then applied to the board under test and its test point outputs are compared with the stored output test pattern file for the good board. The major shortcoming of this method is that it does not allow the user to freely change the input test patterns for the board under test. As a result, the test is limited to a restricted set of input test patterns exercised with the good board.
Still another method of printed circuit board testing is to enter into a computer and store on a disk file the board's schematic. Then, a known input test pattern is applied under computer control to the aforementioned schematic and the schematic responses to this test pattern are stored by a computer in an appropriate output test pattern file. In the final step, the same input test pattern is applied to the board under test and its response is compared with the previously stored output test file. However, since the propagation delays assigned to the chips on the schematic strongly affect the resulting reference output signals, and since the propagation delays of the real chips vary from board to board, it is difficult to achieve good synchronization and reliable correlation between the calculated and asynchronously captured output signals from the test board.
Most presently used test methods and tools are based on a set of strictly predefined input test patterns. The user is not able to modify the input test patterns on the fly in order to adapt to a specific board malfunction. This is the major restriction that hampers the development of fully automated test equipment.
Another disadvantage of the test pattern based equipment is that it cannot test boards in a live system environment because the test patterns in use will vary in an unpredictable manner and it is impossible to create reference output test patterns apriori
Still another disadvantage of the present test equipment is that it is based on specialized hardware, making the test equipment gear unduly restrictive and expensive.
The presently used predefined test patterns force a user to test boards with generalized test patterns, which may not be suitable for the given fault condition. As a result, the test is quite inefficient and unduly time consuming.
To optimize board test, the user must spend a considerable amount of time on manual tweaking of the test patterns. As a result, board test is an expensive and time consuming process that cannot be used on small production runs of printed circuit boards.